Bài giảng Introduction to Computing Systems - Chapter 3 Digital Logic Structures

Chapter 3Digital LogicStructuresTransistor: Building Block of ComputersMicroprocessors contain millions of transistorsIntel Pentium 4 (2000): 48 millionIBM PowerPC 750FX (2002): 38 millionIBM/Apple PowerPC G5 (2003): 58 millionLogically, each transistor acts as a switchCombined to implement logic functions AND, OR, NOTCombined to build higher-level structuresAdder, multiplexer, decoder, register, Combined to build processorLC-32Simple Switch CircuitSwitch open:No current through circuitLight is offVout is +2.9VSwitch closed:Short circuit across switchCurrent flowsLight is onVout is 0VSwitch-based circuits can easily represent two states:on/off, open/closed, voltage/no voltage. 3n-type MOS TransistorMOS = Metal Oxide Semiconductortwo types: n-type and p-typen-typewhen Gate has positive voltage,short circuit between #1 and #2(switch closed)when Gate has zero voltage,open circuit between #1 and #2(switch open)Gate = 1Gate = 0Terminal #2 must beconnected to GND (0V).4p-type MOS Transistorp-type is complementary to n-typewhen Gate has positive voltage,open circuit between #1 and #2(switch open)when Gate has zero voltage,short circuit between #1 and #2(switch closed)Gate = 1Gate = 0Terminal #1 must beconnected to +2.9V.5Logic GatesUse switch behavior of MOS transistorsto implement logical functions: AND, OR, NOT.Digital symbols:recall that we assign a range of analog voltages to eachdigital (logic) symbolassignment of voltage ranges depends on electrical properties of transistors being usedtypical values for "1": +5V, +3.3V, +2.9Vfrom now on we'll use +2.9V6CMOS CircuitComplementary MOSUses both n-type and p-type MOS transistorsp-typeAttached to + voltagePulls output voltage UP when input is zeron-typeAttached to GNDPulls output voltage DOWN when input is oneFor all inputs, make sure that output is either connected to GND or to +,but not both!7Inverter (NOT Gate)InOut0 V2.9 V2.9 V0 VInOut0110Truth table8NOR GateABC001010100110Note: Serial structure on top, parallel on bottom.9OR GateAdd inverter to NOR.ABC00001110111110NAND Gate (AND-NOT)ABC001011101110Note: Parallel structure on top, serial on bottom.11AND GateAdd inverter to NAND.ABC00001010011112Basic Logic Gates13DeMorgan's LawConverting AND to OR (with some help from NOT)Consider the following gate:AB001110011001100101110001Same as A+B!To convert AND to OR (or vice versa),invert inputs and output.14More than 2 Inputs?AND/OR can take any number of inputs.AND = 1 if all inputs are 1.OR = 1 if any input is 1.Similar for NAND/NOR.Can implement with multiple two-input gates,or with single CMOS circuit.15SummaryMOS transistors are used as switches to implementlogic functions.n-type: connect to GND, turn on (with 1) to pull down to 0p-type: connect to +2.9V, turn on (with 0) to pull up to 1Basic gates: NOT, NOR, NANDLogic functions are usually expressed with AND, OR, and NOTDeMorgan's LawConvert AND to OR (and vice versa) by inverting inputs and output16Building Functions from Logic GatesCombinational Logic Circuitoutput depends only on the current inputsstatelessSequential Logic Circuitoutput depends on the sequence of inputs (past and present)stores information (state) from past inputsWe'll first look at some useful combinational circuits,then show how to use sequential circuits to store information.17Decodern inputs, 2n outputsexactly one output is 1 for each possible input pattern2-bitdecoder18Multiplexer (MUX)n-bit selector and 2n inputs, one outputoutput equals one of the inputs, depending on selector4-to-1 MUX19Full AdderAdd two bits and carry-in,produce one-bit sum and carry-out.ABCinSCout000000011001010011011001010101110011111120Four-bit Adder21Logical CompletenessCan implement ANY truth table with AND, OR, NOT.ABCD000000100101011010001011110011101. AND combinations that yield a "1" in the truth table.2. OR the resultsof the AND gates.22Combinational vs. SequentialCombinational Circuitalways gives the same output for a given set of inputsex: adder always generates sum and carry,regardless of previous inputsSequential Circuitstores informationoutput depends on stored information (state) plus inputso a given input might produce different outputs,depending on the stored informationexample: ticket counteradvances when you push the buttonoutput depends on previous stateuseful for building “memory” elements and “state machines”23R-S Latch: Simple Storage ElementR is used to “reset” or “clear” the element – set it to zero.S is used to “set” the element – set it to one.If both R and S are one, out could be either zero or one.“quiescent” state -- holds its previous valuenote: if a is 1, b is 0, and vice versa1011110011001124Clearing the R-S latchSuppose we start with output = 1, then change R to zero.Output changes to zero.Then set R=1 to “store” value in quiescent state.101111001010001125Setting the R-S LatchSuppose we start with output = 0, then change S to zero.Output changes to one.Then set S=1 to “store” value in quiescent state.11001101110026R-S Latch SummaryR = S = 1hold current value in latchS = 0, R=1set value to 1R = 0, S = 1set value to 0R = S = 0both outputs equal onefinal state determined by electrical properties of gatesDon’t do it!27Gated D-LatchTwo inputs: D (data) and WE (write enable)when WE = 1, latch is set to value of DS = NOT(D), R = Dwhen WE = 0, latch holds previous valueS = R = 128RegisterA register stores a multi-bit value.We use a collection of D-latches, all controlled by a common WE.When WE=1, n-bit value D is written to register.29Representing Multi-bit ValuesNumber bits from right (0) to left (n-1)just a convention -- could be left to right, but must be consistentUse brackets to denote range:D[l:r] denotes bit l to bit r, from left to rightMay also see A, especially in hardware block diagrams.A = 0101001101010101A[2:0] = 101A[14:9] = 10100101530MemoryNow that we know how to store bits,we can build a memory – a logical k × m array of stored bits.•••k = 2nlocationsm bitsAddress Space:number of locations(usually a power of 2)Addressability:number of bits per location(e.g., byte-addressable)3122 x 3 Memoryaddressdecoderword selectword WEaddresswriteenableinput bitsoutput bits32More Memory DetailsThis is a not the way actual memory is implemented.fewer transistors, much more dense, relies on electrical propertiesBut the logical structure is very similar.address decoderword select lineword write enableTwo basic kinds of RAM (Random Access Memory)Static RAM (SRAM)fast, maintains data as long as power appliedDynamic RAM (DRAM)slower but denser, bit storage decays – must be periodically refreshedAlso, non-volatile memories: ROM, PROM, flash, 33State MachineAnother type of sequential circuitCombines combinational logic with storage“Remembers” state, and changes output (and state) based on inputs and current stateState MachineCombinationalLogic CircuitStorageElementsInputsOutputs34Combinational vs. SequentialTwo types of “combination” locks418430155102025CombinationalSuccess depends only onthe values, not the order in which they are set.SequentialSuccess depends onthe sequence of values(e.g, R-13, L-22, R-3).35StateThe state of a system is a snapshot ofall the relevant elements of the systemat the moment the snapshot is taken.Examples:The state of a basketball game can be represented bythe scoreboard.Number of points, time remaining, possession, etc.The state of a tic-tac-toe game can be represented bythe placement of X’s and O’s on the board.36State of Sequential LockOur lock example has four different states,labelled A-D:A: The lock is not open, and no relevant operations have been performed.B: The lock is not open, and the user has completed the R-13 operation.C: The lock is not open, and the user has completed R-13, followed by L-22.D: The lock is open.37State DiagramShows states and actions that cause a transition between states.38Finite State MachineA description of a system with the following components:A finite number of statesA finite number of external inputsA finite number of external outputsAn explicit specification of all state transitionsAn explicit specification of what determines eachexternal output valueOften described by a state diagram.Inputs trigger state transitions.Outputs are associated with each state (or with each transition).39The ClockFrequently, a clock circuit triggers transition fromone state to the next.At the beginning of each clock cycle,state machine makes a transition,based on the current state and the external inputs.Not always required. In lock example, the input itself triggers a transition.“1”“0”timeOneCycle40Implementing a Finite State MachineCombinational logicDetermine outputs and next state.Storage elementsMaintain state representation.State MachineCombinationalLogic CircuitStorageElementsInputsOutputsClock41Storage: Master-Slave FlipflopA pair of gated D-latches, to isolate next state from current state.During 1st phase (clock=1),previously-computed statebecomes current state and issent to the logic circuit.During 2nd phase (clock=0),next state, computed bylogic circuit, is stored inLatch A.42StorageEach master-slave flipflop stores one state bit.The number of storage elements (flipflops) neededis determined by the number of states(and the representation of each state).Examples:Sequential lockFour states – two bitsBasketball scoreboard7 bits for each score, 5 bits for minutes, 6 bits for seconds,1 bit for possession arrow, 1 bit for half, 43Complete ExampleA blinking traffic signNo lights on1 & 2 on1, 2, 3, & 4 on1, 2, 3, 4, & 5 on(repeat as long as switchis turned on)DANGERMOVERIGHT1234544Traffic Sign State DiagramState bit S1State bit S0Switch onSwitch offOutputsTransition on each clock cycle.45Traffic Sign Truth TablesOutputs(depend only on state: S1S0)S1S0ZYX00000011001011011111Lights 1 and 2Lights 3 and 4Light 5Next State: S1’S0’(depend on state and input)InS1S0S1’S0’0XX0010001101101101111100SwitchWhenever In=0, next state is 00.46Traffic Sign LogicMaster-slaveflipflop47From Logic to Data PathThe data path of a computer is all the logic used toprocess information.See the data path of the LC-3 on next slide.Combinational LogicDecoders -- convert instructions into control signalsMultiplexers -- select inputs and outputsALU (Arithmetic and Logic Unit) -- operations on dataSequential LogicState machine -- coordinate control signals and data movementRegisters and latches -- storage elements48LC-3 Data PathCombinationalLogicState MachineStorage49